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Josep Torrellas

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Saburo Muroga Professor, Computer Science
Ph.D. Electrical Engineering, Stanford University, 1992

Professor Torrellas's research focuses on new processor, memory, and system technologies and organizations to build novel computer architectures. The goal is to design high-performance computers that are very easy to program, reliable, and built out of commodity components.

The main emphases are on several areas: 1) architecture and software support for Thread-Level Speculation (TLS), 2) architectural design for reliability, debuggability, and fault recovery, 3) reconfigurable architectures (see the Morphable Multithreaded Memory Tiles (M3T) architecture), 4) architectures that integrate many processor cores and substantial memory on a chip (See the FlexRAM Intelligent Memory System), and 5) architectural techniques for energy management in advanced chips.

(217) 244-4148
torrellaatillinois [dot] edu